ASIC/FPGA Architecte Manager Jobs in Les Clayes-sous-Bois – France at ATOS FRANCE

Title: ASIC/FPGA Architecte Manager


Location: Les Clayes-sous-Bois – France

Category: IT/Tech

Position:  ASIC/FPGA Architecte Manager (H/F)

Location: Les Clayes-sous-Bois

Eviden is an Atos Group business with an annual revenue of circa € 5 billion and a global leader in data-driven, trusted and sustainable

digital transformation

. As a next generation digital business with worldwide leading positions in digital, cloud, data, advanced computing and security, it brings deep expertise for all industries in more than 47 countries. By uniting unique high-end technologies across the full digital continuum with 55,000 world-class talents, Eviden expands the possibilities of data and technology, now and for generations to come.

Eviden, European leader in the development of IT products for High Performance Computing, Artificial Intelligence, Big Data and Cybersecurity. Within R&D, the ASIC team is made up of 70 employees divided into 3 areas dedicated to the design, verification and physical implementation of integrated circuits for systems designed by Atos (HPC, servers, etc.) and is recognized for its experience in the design and integration of complex ASICs.

The software and hardware architecture of future products is defined within the Architecture department of Product Architecture & Program, in


with the marketing and development teams. In addition, R&D research projects with customers and partners actively contribute to the success of the program.

You will

join this team to work on the next generations of Eviden Asics (BXI Interconnect, Node Controller, etc.).

In close


with system hardware and software architects, you will define the functionalities of new generation products reflecting marketing requirements.

You will

be assisted by modeling and implementation experts to guarantee the performance and cost of the solution.

* This position is in one of the Atos/Bull research and development centers, Clayes-sous-Bois or Bruyères-le-Châtel in Ile-de-France or Grenoble or Sophia.

Your role

will include the following activities:

• Manage the ASIC architecture team

• Writing requirements based on customer and marketing requests

• Writing component-level architecture specifications with functional requirements and functional interfaces

• Support the development team at every stage of the ASIC design flow

• Work closely with the software team to optimize programming models and semantics

• Prepare performance projections and cost assessment to improve the quality of the decision-making process at each stage of the project

• Drive innovations in RDMA-based technologies for Ethernet or HPC beyond the state of the art and design hardware to provide both capabilities.


• You will work closely with European research centers and start-ups to define the next generation of interconnection technologies.

• You must have a strong focus on efficient hardware design, with good systems knowledge to code hardware and software to achieve scalable performance and robust solutions.

Your skills

range from providing silicon design engineering advice to interfacing with software teams and customers.

• You will propose functionalities optimizing the performance of HPC applications executed on a supercomputer embedding a high-performance network. This includes driv…


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